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Section: 33.5.4 [atomics.order] Status: CD1 Submitter: Jens Maurer Opened: 2008-03-22 Last modified: 2016-01-28
Priority: Not Prioritized
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33.5.4 [atomics.order] p1 says in the table that
Element Meaning memory_order_acq_rel the operation has both acquire and release semantics
To my naked eye, that seems to imply that even an atomic read has both acquire and release semantics.
Then, p1 says in the table:
Element Meaning memory_order_seq_cst the operation has both acquire and release semantics, and, in addition, has sequentially-consistent operation ordering
So that seems to be "the same thing" as memory_order_acq_rel, with additional constraints.
I'm then reading p2, where it says:
The memory_order_seq_cst operations that load a value are acquire operations on the affected locations. The memory_order_seq_cst operations that store a value are release operations on the affected locations.
That seems to imply that atomic reads only have acquire semantics. If that is intended, does this also apply to memory_order_acq_rel and the individual load/store operations as well?
Also, the table in p1 contains phrases with "thus" that seem to indicate consequences of normative wording in 6.9.2 [intro.multithread]. That shouldn't be in normative text, for the fear of redundant or inconsistent specification with the other normative text.
Double-check 126.96.36.199 [atomics.types.operations] that each operation clearly says whether it's a load or a store operation, or both. (It could be clearer, IMO. Solution not in current proposed resolution.)
33.5.4 [atomics.order] p2: What's a "consistent execution"? It's not defined in 6.9.2 [intro.multithread], it's just used in notes there.
And why does 188.8.131.52 [atomics.types.operations] p9 for "load" say:
Requires: The order argument shall not be memory_order_acquire nor memory_order_acq_rel.
(Since this is exactly the same restriction as for "store", it seems to be a typo.)
And then: 184.108.40.206 [atomics.types.operations] p12:
These operations are read-modify-write operations in the sense of the "synchronizes with" definition (6.9.2 [intro.multithread]), so both such an operation and the evaluation that produced the input value synchronize with any evaluation that reads the updated value.
This is redundant with 6.9.2 [intro.multithread], see above for the reasoning.
[ San Francisco: ]
Boehm: "I don't think that this changes anything terribly substantive, but it improves the text."
Note that "Rephrase the table in as [sic] follows..." should read "Replace the table in [atomics.order] with the following...."
The proposed resolution needs more work. Crowl volunteered to address all of the atomics issues in one paper.
This issue is addressed in N2783.
edit 33.5.4 [atomics.order], paragraph 1 as follows.
memory_orderspecifies the detailed regular (non-atomic) memory synchronization order as defined in
Clause 1.7and may provide for operation ordering. Its enumerated values and their meanings are as follows:
remove table 136 in 33.5.4 [atomics.order].
Table 136 — memory_order effects Element Meaning
the operation does not order memory
the operation performs a release operation on the affected memory location, thus making regular memory writes visible to other threads through the atomic variable to which it is applied
the operation performs an acquire operation on the affected memory location, thus making regular memory writes in other threads released through the atomic variable to which it is applied visible to the current thread
the operation performs a consume operation on the affected memory location, thus making regular memory writes in other threads released through the atomic variable to which it is applied visible to the regular memory reads that are dependencies of this consume operation.
the operation has both acquire and release semantics
the operation has both acquire and release semantics, and, in addition, has sequentially-consistent operation ordering
edit 33.5.4 [atomics.order], paragraph 2 as follows.
memory_order_seq_cstoperations that load a value are acquire operations on the affected locations. The
memory_order_seq_cstoperations that store a value are release operations on the affected locations. In addition, in a consistent execution, there
must bea single total order S on all
memory_order_seq_cstoperations, consistent with the happens before order and modification orders for all affected locations, such that each
memory_order_seq_cstoperation observes either the last preceding modification according to this order S, or the result of an operation that is not
memory_order_seq_cst. [Note: Although it is not explicitly required that S include locks, it can always be extended to an order that does include lock and unlock operations, since the ordering between those is already included in the happens before ordering. —end note]